Silicon Labs /SiM3_NRND /SIM3C164_B /CLKCTRL_0 /APBCLKG0

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Interpret as APBCLKG0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)PLL0CEN 0 (DISABLED)PB0CEN 0 (DISABLED)USART0CEN 0 (DISABLED)USART1CEN 0 (DISABLED)UART0CEN 0 (DISABLED)UART1CEN 0 (DISABLED)SPI0CEN 0 (DISABLED)SPI1CEN 0 (DISABLED)SPI2CEN 0 (DISABLED)I2C0CEN 0 (DISABLED)I2C1CEN 0 (DISABLED)EPCA0CEN 0 (DISABLED)PCA0CEN 0 (DISABLED)PCA1CEN 0 (DISABLED)SSG0CEN 0 (DISABLED)TIMER0CEN 0 (DISABLED)TIMER1CEN 0 (DISABLED)ADC0CEN 0 (DISABLED)ADC1CEN 0 (DISABLED)CMP0CEN 0 (DISABLED)CMP1CEN 0 (DISABLED)CS0CEN 0 (DISABLED)AES0CEN 0 (DISABLED)CRC0CEN 0 (DISABLED)IDAC0CEN 0 (DISABLED)IDAC1CEN 0 (DISABLED)LPT0CEN 0 (DISABLED)I2S0CEN 0 (DISABLED)EVREGCEN 0 (DISABLED)FLCTRLCEN

SPI0CEN=DISABLED, I2S0CEN=DISABLED, CS0CEN=DISABLED, UART1CEN=DISABLED, PCA0CEN=DISABLED, USART0CEN=DISABLED, I2C0CEN=DISABLED, I2C1CEN=DISABLED, ADC0CEN=DISABLED, CMP0CEN=DISABLED, SSG0CEN=DISABLED, SPI1CEN=DISABLED, USART1CEN=DISABLED, CRC0CEN=DISABLED, TIMER0CEN=DISABLED, CMP1CEN=DISABLED, PLL0CEN=DISABLED, ADC1CEN=DISABLED, TIMER1CEN=DISABLED, IDAC1CEN=DISABLED, IDAC0CEN=DISABLED, EVREGCEN=DISABLED, PCA1CEN=DISABLED, FLCTRLCEN=DISABLED, SPI2CEN=DISABLED, LPT0CEN=DISABLED, AES0CEN=DISABLED, UART0CEN=DISABLED, EPCA0CEN=DISABLED, PB0CEN=DISABLED

Description

APB Clock Gate 0

Fields

PLL0CEN

PLL Module Clock Enable.

0 (DISABLED): Disable the APB clock to the PLL0 registers (default).

1 (ENABLED): Enable the APB clock to the PLL0 registers.

PB0CEN

Port Bank Module Clock Enable.

0 (DISABLED): Disable the APB clock to the Port Bank Modules (default).

1 (ENABLED): Enable the APB clock to the Port Bank Modules.

USART0CEN

USART0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the USART0 Module (default).

1 (ENABLED): Enable the APB clock to the USART0 Module.

USART1CEN

USART1 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the USART1 Module (default).

1 (ENABLED): Enable the APB clock to the USART1 Module.

UART0CEN

UART0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the UART0 Module (default).

1 (ENABLED): Enable the APB clock to the UART0 Module.

UART1CEN

UART1 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the UART1 Module (default).

1 (ENABLED): Enable the APB clock to the UART1 Module.

SPI0CEN

SPI0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the SPI0 Module (default).

1 (ENABLED): Enable the APB clock to the SPI0 Module.

SPI1CEN

SPI1 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the SPI1 Module (default).

1 (ENABLED): Enable the APB clock to the SPI1 Module.

SPI2CEN

SPI2 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the SPI2 Module (default).

1 (ENABLED): Enable the APB clock to the SPI2 Module.

I2C0CEN

I2C0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the I2C0 Module (default).

1 (ENABLED): Enable the APB clock to the I2C0 Module.

I2C1CEN

I2C1 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the I2C1 Module (default).

1 (ENABLED): Enable the APB clock to the I2C1 Module.

EPCA0CEN

EPCA0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the EPCA0 Module (default).

1 (ENABLED): Enable the APB clock to the EPCA0 Module.

PCA0CEN

PCA0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the PCA0 Module (default).

1 (ENABLED): Enable the APB clock to the PCA0 Module.

PCA1CEN

PCA1 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the PCA1 Module (default).

1 (ENABLED): Enable the APB clock to the PCA1 Module.

SSG0CEN

SSG0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the SSG0 Module (default).

1 (ENABLED): Enable the APB clock to the SSG0 Module.

TIMER0CEN

TIMER0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the TIMER0 Module (default).

1 (ENABLED): Enable the APB clock to the TIMER0 Module.

TIMER1CEN

TIMER1 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the TIMER1 Module (default).

1 (ENABLED): Enable the APB clock to the TIMER1 Module.

ADC0CEN

SARADC0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the SARADC0 Module (default).

1 (ENABLED): Enable the APB clock to the SARADC0 Module.

ADC1CEN

SARADC1 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the SARADC1 Module (default).

1 (ENABLED): Enable the APB clock to the SARADC1 Module.

CMP0CEN

Comparator 0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the Comparator 0 Module (default).

1 (ENABLED): Enable the APB clock to the Comparator 0 Module.

CMP1CEN

Comparator 1 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the Comparator 1 Module (default).

1 (ENABLED): Enable the APB clock to the Comparator 1 Module.

CS0CEN

Capacitive Sensing (CAPSENSE0) Module Clock Enable.

0 (DISABLED): Disable the APB clock to the CAPSENSE0 Module (default).

1 (ENABLED): Enable the APB clock to the CAPSENSE0 Module.

AES0CEN

AES0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the AES0 Module (default).

1 (ENABLED): Enable the APB clock to the AES0 Module.

CRC0CEN

CRC0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the CRC0 Module (default).

1 (ENABLED): Enable the APB clock to the CRC0 Module.

IDAC0CEN

IDAC0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the IDAC0 Module (default).

1 (ENABLED): Enable the APB clock to the IDAC0 Module.

IDAC1CEN

IDAC1 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the IDAC1 Module (default).

1 (ENABLED): Enable the APB clock to the IDAC1 Module.

LPT0CEN

Low Power Timer (LPTIMER0) Module Clock Enable.

0 (DISABLED): Disable the APB clock to the LPTIMER0 Module (default).

1 (ENABLED): Enable the APB clock to the LPTIMER0 Module.

I2S0CEN

I2S0 Module Clock Enable.

0 (DISABLED): Disable the APB clock to the I2S0 Module (default).

1 (ENABLED): Enable the APB clock to the I2S0 Module.

EVREGCEN

External Regulator Clock Enable.

0 (DISABLED): Disable the APB clock to the External Regulator Module (EXTVREG0) (default).

1 (ENABLED): Enable the APB clock to the External Regulator Module (EXTVREG0).

FLCTRLCEN

Flash Controller Clock Enable.

0 (DISABLED): Disable the APB clock to the Flash Controller Module (FLASHCTRL0) (default).

1 (ENABLED): Enable the APB clock to the Flash Controller Module (FLASHCTRL0).

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